...
If this method is used, a legend should be added to the top sheet using notes blocks.
...
Layout
Design Rules
{}
Layout
{}
Silkscreen
All designators should be shown.
Font style should be stroke, and font size may be adjusted according to density. However, ensure you stay within fabrication limitsDesign rules must start at fabrication limits. Typically we base off JLCPCB’s capabilities.
Depending on project requirements, rules should be made more conservative. For example, expanding minimum clearance if the board has space to enable more conservative clearances.
Rules violations should never be waived. It is best to discuss the design rule causing violations, and then create additional rules, with corresponding documentation in Altium or in Confluence, to negate the violations.
Preset Design Rule Files
{}
Layout
There is far too much to cover in good layout. Therefore these will just highlight some high level items:
Electrical requirements, such as differential pairs, filtering, and avoidance of parasitic/coupling should take precedence in layout.
However, designers must take care to preserve aesthetics in layout. Ultimately, a clean looking board is a big part of the first impression we make on design judges
Alignment tools must be used to perfectly align and space components
Silkscreen
Designators
All designators should be shown.
Font style should be stroke, and font size may be adjusted according to density. Additionally, pointers can be used to place designators around dense regions. Never alter a layout to fit designators; they are nice to have, but always less important than board functionality.
Ensure you stay within fabrication limits when changing font size. If density is exceedingly prohibitive, designators can be omitted.
Logos and Attribution
All boards should include at least 1 NER logo.
All boards should include the names of board layout contributors. We recommend the format of initials followed by class year. I.e. “MM '23” for Matt McCauley, class of 2023.
Board Outline
The board outline must be represented in a mechanical layer. For our boards this is typically M1. The board outline layer should include the outer boundary as well as any slots, cutouts, etc.
There are tools to rapidly update the board outline. See https://nerdocs.atlassian.net/wiki/spaces/NER/pages/156205064/PCB+Layout#Update-Board-Outline.